#ifndef GEN_RENDER_XML
#define GEN_RENDER_XML

/* Autogenerated file, DO NOT EDIT manually!

This file was generated by the rules-ng-ng headergen tool in this git repository:
https://github.com/olvaffe/envytools/
git clone https://github.com/olvaffe/envytools.git

Copyright (C) 2014 by the following authors:
- Chia-I Wu <olvaffe@gmail.com> (olv)

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:

The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/


#define GEN6_RENDER_TYPE__MASK					0xe0000000
#define GEN6_RENDER_TYPE__SHIFT					29
#define GEN6_RENDER_TYPE_RENDER					(0x3 << 29)
#define GEN6_RENDER_SUBTYPE__MASK				0x18000000
#define GEN6_RENDER_SUBTYPE__SHIFT				27
#define GEN6_RENDER_SUBTYPE_COMMON				(0x0 << 27)
#define GEN6_RENDER_SUBTYPE_SINGLE_DW				(0x1 << 27)
#define GEN6_RENDER_SUBTYPE_MEDIA				(0x2 << 27)
#define GEN6_RENDER_SUBTYPE_3D					(0x3 << 27)
#define GEN6_RENDER_OPCODE__MASK				0x07ff0000
#define GEN6_RENDER_OPCODE__SHIFT				16
#define GEN6_RENDER_OPCODE_STATE_BASE_ADDRESS			(0x101 << 16)
#define GEN6_RENDER_OPCODE_STATE_SIP				(0x102 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VF_STATISTICS		(0xb << 16)
#define GEN6_RENDER_OPCODE_PIPELINE_SELECT			(0x104 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_VFE_STATE			(0x0 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_CURBE_LOAD			(0x1 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD	(0x2 << 16)
#define GEN6_RENDER_OPCODE_MEDIA_STATE_FLUSH			(0x4 << 16)
#define GEN7_RENDER_OPCODE_GPGPU_WALKER				(0x105 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS	(0x1 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS	(0x2 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS			(0x4 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_URB				(0x5 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER			(0x5 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER		(0x6 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER		(0x7 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_BUFFERS		(0x8 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VERTEX_ELEMENTS		(0x9 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_INDEX_BUFFER			(0xa << 16)
#define GEN75_RENDER_OPCODE_3DSTATE_VF				(0xc << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS	(0xd << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS		(0xe << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SCISSOR_STATE_POINTERS	(0xf << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_VS				(0x10 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_GS				(0x11 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CLIP				(0x12 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SF				(0x13 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_WM				(0x14 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS			(0x15 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS			(0x16 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS			(0x17 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_SAMPLE_MASK			(0x18 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_HS			(0x19 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_CONSTANT_DS			(0x1a << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_HS				(0x1b << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_TE				(0x1c << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DS				(0x1d << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_STREAMOUT			(0x1e << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SBE				(0x1f << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PS				(0x20 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP	(0x21 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC	(0x23 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS		(0x24 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS	(0x25 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_VS	(0x26 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_HS	(0x27 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_DS	(0x28 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_GS	(0x29 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS	(0x2a << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_VS	(0x2b << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_HS	(0x2c << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_DS	(0x2d << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_GS	(0x2e << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS	(0x2f << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_VS			(0x30 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_HS			(0x31 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_DS			(0x32 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_URB_GS			(0x33 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_DRAWING_RECTANGLE		(0x100 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_DEPTH_BUFFER			(0x105 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_OFFSET		(0x106 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_POLY_STIPPLE_PATTERN		(0x107 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_LINE_STIPPLE			(0x108 << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_AA_LINE_PARAMETERS		(0x10a << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_GS_SVB_INDEX			(0x10b << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_MULTISAMPLE			(0x10d << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_STENCIL_BUFFER		(0x10e << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_HIER_DEPTH_BUFFER		(0x10f << 16)
#define GEN6_RENDER_OPCODE_3DSTATE_CLEAR_PARAMS			(0x110 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_VS	(0x112 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_HS	(0x113 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_DS	(0x114 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_GS	(0x115 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_PUSH_CONSTANT_ALLOC_PS	(0x116 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SO_DECL_LIST			(0x117 << 16)
#define GEN7_RENDER_OPCODE_3DSTATE_SO_BUFFER			(0x118 << 16)
#define GEN6_RENDER_OPCODE_PIPE_CONTROL				(0x200 << 16)
#define GEN6_RENDER_OPCODE_3DPRIMITIVE				(0x300 << 16)
#define GEN6_RENDER_LENGTH__MASK				0x000000ff
#define GEN6_RENDER_LENGTH__SHIFT				0
#define GEN6_MOCS_LLC__MASK					0x00000003
#define GEN6_MOCS_LLC__SHIFT					0
#define GEN6_MOCS_LLC_PTE					0x0
#define GEN6_MOCS_LLC_UC					0x1
#define GEN6_MOCS_LLC_ON					0x2
#define GEN7_MOCS_LLC__MASK					0x00000002
#define GEN7_MOCS_LLC__SHIFT					1
#define GEN7_MOCS_LLC_PTE					(0x0 << 1)
#define GEN7_MOCS_LLC_ON					(0x1 << 1)
#define GEN75_MOCS_LLC__MASK					0x00000006
#define GEN75_MOCS_LLC__SHIFT					1
#define GEN75_MOCS_LLC_PTE					(0x0 << 1)
#define GEN75_MOCS_LLC_UC					(0x1 << 1)
#define GEN75_MOCS_LLC_ON					(0x2 << 1)
#define GEN75_MOCS_LLC_ELLC					(0x3 << 1)
#define GEN7_MOCS_L3__MASK					0x00000001
#define GEN7_MOCS_L3__SHIFT					0
#define GEN7_MOCS_L3_UC						0x0
#define GEN7_MOCS_L3_ON						0x1
#define GEN6_BASE_ADDR__MASK					0xfffff000
#define GEN6_BASE_ADDR__SHIFT					12
#define GEN6_BASE_ADDR__SHR					12
#define GEN6_BASE_ADDR_MOCS__MASK				0x00000f00
#define GEN6_BASE_ADDR_MOCS__SHIFT				8
#define GEN6_BASE_ADDR_MODIFIED					(0x1 << 0)
#define GEN6_STATE_BASE_ADDRESS__SIZE				10


#define GEN6_BASE_ADDR_DW1_GENERAL_STATELESS_MOCS__MASK		0x000000f0
#define GEN6_BASE_ADDR_DW1_GENERAL_STATELESS_MOCS__SHIFT	4
#define GEN6_BASE_ADDR_DW1_GENERAL_STATELESS_FORCE_WRITE_THRU	(0x1 << 3)









#define GEN6_STATE_SIP__SIZE					2


#define GEN6_SIP_DW1_KERNEL_ADDR__MASK				0xfffffff0
#define GEN6_SIP_DW1_KERNEL_ADDR__SHIFT				4
#define GEN6_SIP_DW1_KERNEL_ADDR__SHR				4

#define GEN6_PIPELINE_SELECT__SIZE				1

#define GEN6_PIPELINE_SELECT_DW0_SELECT__MASK			0x00000003
#define GEN6_PIPELINE_SELECT_DW0_SELECT__SHIFT			0
#define GEN6_PIPELINE_SELECT_DW0_SELECT_3D			0x0
#define GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA			0x1
#define GEN7_PIPELINE_SELECT_DW0_SELECT_GPGPU			0x2


#endif /* GEN_RENDER_XML */
